Tessent Multi-die software is a powerful tool for semiconductor design and testing.
Tessent Multi-die software
Next-generation devices increasingly feature complex architectures that connect dies vertically (3D IC) or side-by-side (2.5D) so that they behave as a single device. Tessent Multi-die delivers comprehensive automation for the highly complex DFT tasks associated with these 2.5D and 3D IC designs.
- Dramatically speeds and simplifies critical DFT planning and implementation tasks for next-generation ICs based on 2.5D and 3D architectures
- Enables the rapid generation of IEEE 1838-compliant hardware for 3D IC architectures
- Extracts a single Boundary Scan Description Language (BSDL) for package level and generates patterns
- Extracts die-to-die BSDL and generates boundary-scan-based inter-die patterns
- Supports IEEE 1838 flexible parallel port (FPP) by leveraging the packetized data delivery capabilities of the Tessent
- Streaming Scan Network (SSN), which optimizes DFT test resources for each block without concern for impacts to the rest of the design
- Ability to adhere to and support multiple different standards like IEEE 1687 and IEEE 1149.1
Seamless integration with other Tessent products using an integrated Tessent platform
