Highlighting code coverage elements that are challenging to access through formal methods and remain untested during simulation, offering a valuable metric for assessing verification complexity. This helps engineers identify areas where design modifications can enhance verifiability.
Regardless of the number of well-crafted directed tests or the variety of random seeds employed, the coverage score remains stagnant. Simultaneously, manually specifying waivers to intentionally omit unused IP configurations from the analysis can be a laborious and error-prone task.
Code coverage closure
Questa CoverCheck is an automated formal solution designed to expedite the achievement of code coverage closure. This tool tackles a fundamental challenge in verification: regardless of the array of techniques applied and even after exhaustive test runs, there always remains a portion of uncovered code.
Target coverage holes
Questa CoverCheck automatically explores the state spaces of your Design Under Test (DUT), pinpointing unreachable regions. It also offers the ability to “waive” or exclude items for subsequent analyses. Additionally, it feeds all results into a Unified Coverage DataBase (UCDB) for integration into Questa Verification Management analyses and progress reporting.
